Thin film characterization

by eddy current testing technology

Functional thin films on glassfoil and wafer are crucial to many applications and industries. Modern coatings are adapted to meet the growing demand and requirements such as:

  • More efficient layer stacks depending on their functionality (e.g. higher transparency with low resistivity; better emissivity)
  • Increasing of layer homogenity
  • Reductions in material costs through process optimization / control
  • Optimization of process cycle time and machine utilization
  • Adaptation of substrate size and deposition time

In order to achieve these goals, SURAGUS offers inline and offline testing technology.

Application overviews are available for the following industries:


Metal thickness, sheet resistance, wafer resistivity and conductance measurement

Non-contact metal layer thickness measurement [nm, µm]

Metal layers are applied for achieving electrical, mechanical, chemical and many other characterisitcs. Properties include sheet resistance or conductance when applied as current transporation layer or metal thickness and structural integrity when e.g designing Micro-Electro-Mechanical Systems. Typicall processes are evaporation, sputting, atomic layer deposition (ALD), plating (electroless & electro) and further kinds of spefic PVD and CVD processes. Applications include ICs, MEMS, SENSORS, LEDS, RF, POWER and AUTO. 

The metal thickness is typcially measured by contact Four-Point-Probe (4PP) measurement or by Eddy Curren

Conotour map vs. full map




Noncontact Sheet reistance measurement


NonContact Wafer resistitiv measurement


Noncontact conductance measurment

Eddy Current vs. four point probe (4PP) 

- 4 PP and EC are common measurement in semiconductor industry


Measurement of metal layer thickness

- metal layer thickness can not be measured optical

Eddy Current vs. Hall effect measurements  


Eddy Current vs. van der Paw Hall effect measurements

Further resouces

  • SEMI MF673 — Test Method for Measuring Resistivity of Semiconductor Wafers or Sheet Resistance of Semiconductor Films with a Noncontact Eddy-Current Gauge
  • SEMI M59 — Terminology for Silicon Technology
  • SEMI MF81 — Test Method for Measuring Radial Resistivity Variation on Silicon Wafers
  • SEMI MF84 — Test Method for Measuring Resistivity of Silicon Wafers with an In-Line Four-Point Probe
  • SEMI MF374 — Test Method for Sheet Resistance of Silicon Epitaxial, Diffused, Polysilicon, and Ion-Implanted Layers Using an In-Line Four-Point Probe with the Single-Configuration Procedure
  • SEMI MF1527 — Guide for Application of Certified Reference Materials and Reference Wafers for Calibration and Control of Instruments for Measuring Resistivity of Silicon

Process Overview

  • Deposition
    • „CVD, PVD, plating, evaporation
  • Modification
    • „Implantation / Doping
    • „(De)-oxidation
    • „Annealing/Tempering
  • Removal
    • „Etching       
    • „Polishing
  • Negative layer modification assessment
    • „Cleaning


Opportunities Provided by Non-Contact Eddy Current Testing

  • High Ohm Monitoring
    • Situation
      • „4PP testing required appropriate surfaces quality for establishing electrical contact
      • „Limitations in high ohmic range à not reliable testing possible
    • „Opportunity
      • „Incoming wafer inspection for high ohmic wafer
  • „Imaging & Near Edge Monitoring
    • Situation
      • „Electrical near edge characterization is challenging with currently available conventional solutions
      • „4PP and Eddy Current Testing need to cope with edge effects
      • „EddyCus System provided edge effect compensation algorithms
    • Opportunity
      • „QA and process control for process monitoring of egde zones
  • Process Wafer Monitoring
    • Situation
      • „4PP contact testing is typically applied on test wafer
      • „Indirect measurement based on the assumption of constant processes without any randomness
      • „Testing wafer block tool capacity and create costs
    • „Opportunity
      • „Full confidence in wafer integrity by non-contact testing on process wafers
      • „Reduce amount of test wafer


Applications semiconductor





Panel Level Packaging (WLP) / Fan-Out Wafer Level Packaging (FOWLP)


  • Substrate types:
    • Glass
    • Plastics (molded compounds)
  • Common substrate sizes
    • 410 x 515 mm
    • 510 x 515 mm
    • 500 x 500 mm
    • 600 x 600 mm
    • 650 x 650 mm
  • Typical layers
    • Ti 500 – 1,500 A
    • Cu 1,000 – 5,000 A
  • Requirements
    • Measurement every 5 mm in X and Y.
      Edge exclusion 5 mm
  • Challenges
    • Multilayer system requires pre and post meaurement
  • Solutions
    • Inline --> Sensor integration into cluster tool
    • offline --> EddyCus TF 5050 or TF 6060




Printed Electronics


  • „Antennas
  • „Various smart tags such as such as radio-frequency identification (RFID) tags
  • „Sensors
  • „Display and visual effects
  • „(Inter)connection solutions
  • „OPV
  • „Batteries
  • „Data Storage


  • Smaller device features
  • Increasing device density (less space between devices)
  • Faster deposition and sintering processes
  • Increasing printing width
  • Optimized material usage (e.g. decrease of silver amount used)

Success factors

  • „Price per device needs to be very attractive
  • „Yield maximization
  • „Material input (Ag paste) quality monitoring
  • „Printing process monitoring and process control
  • „Drying / sintering process monitoring and process control
  • „Printed electronics need to be very reliable in order to replace conventional solutions
  • „Final integrity assessment


  • „Testing strategies to support the above factors need to be applied


  • „Structure integrity (defect-free, no short cuts, no missing contacts)
  • „Meeting required electrical performance / line resistance


  • „Printing
  • „Drying, sintering


  • „Line resistance (geometry/thickness @ conductivity)
  • „Drying status

Testing Methods

  • „Contact line resistance testing (2PP Testing, 4PP)
  • „Non-contact line resistance testing (Eddy Current Testing)